Исходники для MSP430, вернее, ссылки на исходники 
MSP-EVK430A320 Code Examples http://www-s.ti.com/sc/psheets/slac004/slac004.zip (1.2M)
| | fsk_modem.pdf - Implementing an FSK Modem
hwmpy.zip - Hardware Multiplier Information and Applications
stk_i2c.zip STK Demo Program That Talks to a 24xx01 I2C EEPROM
The EVK Monitor Code (Software UART)
mon_141.asm
mon_adr.asm
mon_brk.asm
mon_len.asm
STD_DEF.zip - Standard Definitions to include in the Source Code
evk_uart.zip - UART Using the 8-bit Interval as a 19200, 9600 and 1200 Baud |
MSP-STK430A320 Code Examples http://www-s.ti.com/sc/psheets/slac009/slac009.zip (18k)
MSP430x32x Evaluation Kit http://www-s.ti.com/sc/psheets/slac003/slac003.zip (180k)
| | stk_1.asm - Blink "HELLO" on STK LCD
stk_252.asm - TSL252 Light Meter
stk_bt1.asm -MSP430 STK and Simulator Demonstration Program
stk_cnt.asm - P-STK430x320 and ADT430 Simulator Demonstration Program, a 1 Digit BCD Counter Displayed on STK LCD
stk_key.asm - P430 STK Demonstration Program P0.0 Interrupt Driven Key Pad
stk_led2.asm - MSP-STK430x320 Demonstration Program Multitasking LED outputs
stk_p0_0.asm - MSP-STK430x320 Demonstration Program Polling P0.0 and Displaying "Off" or "On on the STK LCD.
stk_rtc.asm - MSP-STK430x320 and ADT430 Simulator Demonstration Program RTC Using Basic Timer
stk_temp.asm - MSP430 Starter Kit Demonstration Program Using Timer/Port used as 16-bit Slope ADC
stk_wdt.asm - MSP-STK430x320 and ADT430 Simulator Demonstration Program WDT Interval Timer used for 99 Count Down Displayed on STK LCD
stk_xbuf.asm - MSP430 STK and Simulator Demonstration Program XBUF used to send Tone Burst |
MSP-FET430X110 Assembler Examples http://www-s.ti.com/sc/psheets/slac010b/slac010b.zip (42k)
| | fet_1.s43 - Software Toggle P1.0
fet110_0831.s43 - Software SPI Interface With TLV0831
fet110_549.s43 - Software SPI Interface TLC549 Set P1.0 if > 0.5*Vcc
fet110_5616.s43 - Software SPI Interface to TLV5616 12-bit DAC
fet110_5timers.s43 - 5Timers + 2 Clock Outputs 32kHz ACLK
fet110_7822.s43 - Software Interface to Read ADS7822
fet110_ca01.s43 - Comp_A Output Comparator_A reference voltages on P2.3
fet110_ca02.s43 - Comp_A Detect Theashold, Set P1.0 if P2.3 > 0.25*Vcc
fet110_ca_temp1.s43 - Comp_A Slope ADC to Detect Temp Level Set P1.0 > 25c
fet110_ca_temp2.s43 - Comp_A Thermometer 0 - 99 F
fet110_cd4511.s43 - Software Interface with CD4511 7-Segment Decoder
fet110_clks.s43 - BasicClock Output buffered SMCLK, ACLK and MCLK/12
fet110_flash_write.s43 - Flash In-System Programming
fet110_fll.s43 - BasicClock Implement Auto RSEL SW FLL
fet110_hc138.s43 - Software Parellel Interface with HC138
fet110_hc164.s43 - Software SPI Interface with HC164 Shift Register
fet110_hc165.s43 - Software SPI Interface with HC165 Shift Register
fet110_hc595.s43 - Software SPI Interface with HC595 Shift Register
fet110_hfxtal.s43 - BasicClock MCLK configured with HF XTAL
fet110_int_P2.s43 - Software Port Interrupt Service on P2.0
fet110_lpm3.s43 - BasicClock LPM3 Using WDT Interrupt, 32kHz ACLK
fet110_lpm4.s43 - BasicClock LPM4, Pulse P1.0 on P2.0_ISR
fet110_poll_P2.s43 - Software Poll P2.0, Set P1.0 if P2.0 = 1
fet110_r2r.s43 - Software Output 6-bit R2R DAC
fet110_ta_cap01.s43 - Timer_A Ultra-low Power 1200hz detect, ACLK +/- 5%
fet110_ta_cap02.s43 - Timer_A Ultra-low Power 1800hz detect, SMCLK +/- 1%
fet110_ta01.s43 - Timer_A Toggle P1.0, CCR0 Contmode ISR, DCO SMCLK
fet110_ta02.s43 - Timer_A Toggle P1.0, CCR0 upmode ISR, DCO SMCLK
fet110_ta03.s43 - Timer_A Toggle P1.0, overflow ISR, DCO SMCLK
fet110_ta04.s43 - Timer_A Toggle P1.0, overflow ISR, 32kHz ACLK
fet110_ta05.s43 - Timer_A Toggle P1.0, CCR0 upmode ISR, 32kHz ACLK
fet110_ta06.s43 - Timer_A Toggle P1.0, CCR1 Contmode ISR, DCO SMCLK
fet110_ta07.s43 - Timer_A Toggle P1.0-3, CCRx Contmode ISR, DCO SMCLK
fet110_ta08.s43 - Timer_A Toggle P1.0-3, CCRx ISR Contmode, 32kHz ACLK
fet110_ta09.s43 - Timer_A Toggle P1.0-3, CCRx ISR Contmode, HF XTAL ACLK
fet110_ta10.s43 - Timer_A Toggle P1.1 With TA0 upmode, DCO SMCLK
fet110_ta11.s43 - Timer_A Toggle P1.1 With TA0 upmode, 32kHz ACLK
fet110_ta12.s43 - Timer_A Toggle P1.1 With TA0 upmode, HF XTAL ACLK
fet110_ta13.s43 - Timer_A Toggle P1.1 With TA0 up-downmode, DCO SMCLK
fet110_ta14.s43 - Timer_A Toggle P1.1 With TA0 up-downmode, 32kHz ACLK
fet110_ta15.s43 - Timer_A Toggle P1.1 With TA0 up-downmode, HF XTAL ACLK
fet110_ta_40k.s43 - Timer_A Output 40khz square wave, UpMode SMCLK DCO
fet110_ta_pwm01.s43 - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet110_ta_pwm02.s43 - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet110_ta_pwm03.s43 - Timer_A PWM TA1-2 upmode, HFTAL ACLK
fet110_ta_pwm04.s43 - Timer_A PWM TA1-2 up-downmode, DCO SMCLK
fet110_ta_pwm05.s43 - Timer_A PWM TA1-2 up-downmode, 32kHz ACLK
fet110_ta_pwm06.s43 - Timer_A PWM TA1-2 up-downmode, HFTAL ACLK
fet110_ta_uart2400.s43 - Timer_A UART 2400 Ultra-low Power Echo, 32kHz ACLK
fet110_ta_uart9600.s43 - Timer_A UART 9600 Echo, HF XTAL ACLK
fet110_ta_uart115k.s43 - Timer_A UART 115200 Echo, HF XTAL ACLK
fet110_wdt01.s43 - WDT Toggle P1.0 Interval overflow ISR, DCO SMCLK
fet110_wdt02.s43 - WDT Toggle P1.0 Interval overflow ISR, 32kHz ACLK
fet110_wdt03.s43 - WDT Toggle P1.0 Interval overflow ISR, HF XTAL ACLK |
MSP-FET430X110 "C" Examples http://www-s.ti.com/sc/psheets/slac011b/slac011b.zip (35k)
| | fet_1.c - Software Toggle P1.0
fet110_549 - Software SPI Interface TLC549 Set P1.0 if > 0.5*Vcc
fet110_ca01.c - Comp_A Output Comparator_A reference voltages on P2.3
fet110_ca02.c - Comp_A Detect theashold, Set P1.0 if P2.3 > 0.25*Vcc
fet110_clks.c - BasicClock Output buffered SMCLK, ACLK and MCLK/12
fet110_flash_write.c - Flash In-System Programming
fet110_fll.c - BasicClock Implement Auto RSEL SW FLL
fet110_hfxtal.c - BasicClock MCLK configured with HF XTAL
fet110_lpm3.c - BasicClock LPM3 Using WDT ISR, 32kHz ACLK
fet110_ta01.c - Timer_A Toggle P1.0, CCR0 Contmode ISR, DCO SMCLK
fet110_ta02.c - Timer_A Toggle P1.0, CCR0 upmode ISR, DCO SMCLK
fet110_ta03.c - Timer_A Toggle P1.0, overflow ISR, DCO SMCLK
fet110_ta04.c - Timer_A Toggle P1.0, overflow ISR, 32kHz ACLK
fet110_ta05.c - Timer_A Toggle P1.0, CCR0 upmode ISR, 32kHz ACLK
fet110_ta06.c - Timer_A Toggle P1.0, CCR1 Contmode ISR, DCO SMCLK
fet110_ta07.c - Timer_A Toggle P1.0-3 CCRx Contmode ISR, DCO SMCLK
fet110_ta08.c - Timer_A Toggle P1.0-3 CCRx Contmode ISR, 32kHz ACLK
fet110_ta09.c - Timer_A Toggle P1.0-3 CCRx Contmode ISR, HF XTAL ACLK
fet110_ta10.c - Timer_A Toggle P1.1 With TA0 upmode, DCO SMCLK
fet110_ta11.c - Timer_A Toggle P1.1 With TA0 upmode, 32kHz ACLK
fet110_ta12.c - Timer_A Toggle P1.1 With TA0 upmode, HF XTAL ACLK
fet110_ta13.c - Timer_A Toggle P1.1 With TA0 up-downmode, DCO SMCLK
fet110_ta14.c - Timer_A Toggle P1.1 With TA0 up-downmode, 32kHz ACLK
fet110_ta15.c - Timer_A Toggle P1.1 With TA0 up-downmode, HF XTAL ACLK
fet110_ta_pwm01.c - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet110_ta_pwm02.c - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet110_ta_pwm03.c - Timer_A PWM TA1-2 upmode, HFTAL ACLK
fet110_ta_pwm04.c - Timer_A PWM TA1-2 up-downmode, DCO SMCLK
fet110_ta_pwm05.c - Timer_A PWM TA1-2 up-downmode, 32kHz ACLK
fet110_ta_pwm06.c - Timer_A PWM TA1-2 up-downmode, HFTAL ACLK
fet110_ta_uart2400.c - Timer_A UART 2400 Ultra-low Power Echo, 32kHz ACLK
fet110_ta_uart9600.c - Timer_A UART 9600 Echo, HF XTAL ACLK
fet110_ta_uart115k.c - Timer_A UART 115200 Echo, HF XTAL ACLK
fet110_wdt01.c - WDT Toggle P1.0 Interval overflow ISR, DCO SMCLK
fet110_wdt02.c - WDT Toggle P1.0 Interval overflow ISR, 32kHz ACLK |
MSP-FET430P120 Assembler Examples http://www-s.ti.com/sc/psheets/slac012/slac012.zip (79k)
| | fet120_1.s43 - Software Toggle P1.0
fet120_5timers.s43 - 5Timers + 2 Clock Outputs 32kHz ACLK
fet120_7822.s43 - Software Interface to Read ADS7822
fet120_ADC10_00.s43 - ADC10 Sample A0, AVcc
fet120_ADC10_01.s43 - ADC10 Sample A0, AVcc, Set P1.0 if A0 > 0.5*AVcc
fet120_ADC10_02.s43 - ADC10 Sample A0, 1.5V, Set P1.0 if A0 > 0.2V
fet120_ADC10_03.s43 - ADC10 Sample A10 Temp Set P1.0 if temp > ~ 29c
fet120_ADC10_04.s43 - ADC10 Sample A0 Signed AVcc Set P1.0 if A0 > 0.5*AVcc
fet120_ADC10_05.s43 - ADC10 Sample A11 lo_Batt Set P1.0 if < 2.3V
fet120_ADC10_06.s43 - ADC10 Output Internal Vref on P2.4 and Osc. on P1.0
fet120_ADC10_07.s43 - ADC10 Sample A0 64x, AVcc, Repeat Single DTC DCO
fet120_ADC10_08.s43 - ADC10 Sample A0 64x, 1.5V, Repeat Single DTC DCO
fet120_ADC10_09.s43 - ADC10 Sample A10 64x, 1.5V, Repeat Single DTC DCO
fet120_ADC10_10.s43 - ADC10 Sample A2-0, AVcc, Single Sequence DTC DCO
fet120_ADC10_11.s43 - ADC10 Sample A0, 1.5V, TA1 Trigger Set P1.0 if > 0.5V
fet120_ADC10_12.s43 - ADC10 Sample A7, 1.5V, TA1 Trigger Ultra-low Power
fet120_ADC10_13.s43 - ADC10 Sample A1 32x, AVcc, TA1 Trigger, DTC DCO
fet120_ADC10_14.s43 - ADC10 Sample A1-0 32x, AVcc, Repeat Sequence, DTC DCO
fet120_ADC10_15.s43 - ADC10 Sample A0 -> TA1, AVcc, DTC DCO
fet120_ADC10_16.s43 - ADC10 Sample A0 -> TA1 ContMode, AVcc, DTC HF XTAL
fet120_ADC10_17.s43 - ADC10 Sample A1-0 -> TA1/2 ContMode, 2.5V, DTC HF XTAL
fet120_ADC10_18.s43 - ADC10 Sample A10 32x Directly to Flash, AVcc, DTC DCO
fet120_ADC10_19.s43 - ADC10 Sample A0 64x, AVcc, DTC HF XTAL
fet120_ADC10_20.s43 - ADC10 Sample A0 2-Block ContMode, DTC HF XTAL
fet120_ADC10_temp.s43 - ADC10 Sample A10 Temp and Convert to oC and oF
fet120_clks.s43 - BasicClock Output buffered SMCLK, ACLK and MCLK/12
fet120_fll2.s43 - BasicClock Implement Continous SW FLL with Auto RSEL
fet120_hfxtal.s43 - BasicClock LFXT1/MCLK configured with HF XTAL
fet120_hfxtal_nmi.s43 - BasicClock LFXT1/MCLK configured with HF XTAL and NMI
fet120_lpm3.s43 - BasicClock LPM3 Using WDT Interrupt ISR, 32kHz ACLK
fet120_nmi.s43 - BasicClock Configure RST/NMI as NMI
fet120_rosc.s43 - BasicClock DCOCLK Biased with External Resistor Rosc
fet120_spi0_016x.s43 - USART0 SPI Interface to HC165/164 Shift Registers
fet120_spi0_0549.s43 - USART0 SPI Interface to TLC549 8-bit ADC
fet120_spi0_7822.s43 - USART0 SPI Interface to ADS7822 ADC
fet120_ta01.s43 - Timer_A Toggle P1.0, CCR0 Contmode ISR, DCO SMCLK
fet120_ta02.s43 - Timer_A Toggle P1.0, CCR0 upmode ISR, DCO SMCLK
fet120_ta03.s43 - Timer_A Toggle P1.0, overflow ISR, DCO SMCLK
fet120_ta04.s43 - Timer_A Toggle P1.0, overflow ISR, 32kHz ACLK
fet120_ta05.s43 - Timer_A Toggle P1.0, CCR0 upmode ISR, 32kHz ACLK
fet120_ta06.s43 - Timer_A Toggle P1.0, CCR1 Contmode ISR, DCO SMCLK
fet120_ta07.s43 - Timer_A Toggle P1.0-3, CCRx Contmode ISR, DCO SMCLK
fet120_ta08.s43 - Timer_A Toggle P1.0-3, CCRx Contmode ISR, 32kHz ACLK
fet120_ta09.s43 - Timer_A Toggle P1.0-3, CCRx Contmode ISR, HF XTAL ACLK
fet120_ta10.s43 - Timer_A Toggle P1.1 With TA0 upmode, DCO SMCLK
fet120_ta11.s43 - Timer_A Toggle P1.1 With TA0 upmode, 32kHz ACLK
fet120_ta12.s43 - Timer_A Toggle P1.1 With TA0 upmode, HF XTAL ACLK
fet120_ta13.s43 - Timer_A Toggle P1.1 With TA0 up-downmode, DCO SMCLK
fet120_ta14.s43 - Timer_A Toggle P1.1 With TA0 up-downmode, 32kHz ACLK
fet120_ta15.s43 - Timer_A Toggle P1.1 With TA0 up-downmode, HF XTAL ACLK
fet120_ta_count.s43 - Timer_A Used as Ultra-low Power Pulse Accumulator
fet120_ta_pwm01.s43 - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet120_ta_pwm02.s43 - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet120_ta_pwm03.s43 - Timer_A PWM TA1-2 upmode, HFTAL ACLK
fet120_ta_pwm04.s43 - Timer_A PWM TA1-2 up-downmode, DCO SMCLK
fet120_ta_pwm05.s43 - Timer_A PWM TA1-2 up-downmode, 32kHz ACLK
fet120_ta_pwm06.s43 - Timer_A PWM TA1-2 up-downmode, HFTAL ACLK
fet120_uart01_02400.s43 - USART0 UART 2400 Ultra-low Power Echo ISR, 32kHz ACLK
fet120_uart01_09600.s43 - USART0 UART 9600 Echo ISR, HF XTAL ACCLK
fet120_uart01_19200.s43 - USART0 UART 19200 Echo ISR, HF XTAL ACLK
fet120_uart02_19200.s43 - USART0 UART 19200 Ultra-low Echo ISR, 32kHz ACLK + DCO
fet120_uart03_19200.s43 - USART0 UART 19200 Echo ISR, 32kHz ACLK + DCO
fet120_uart01_0115k.s43 - USART0 UART 115200 Echo ISR, HF XTAL ACLK
fet120_wdt01.s43 - WDT Toggle P1.0 Interval overflow ISR, DCO SMCLK
fet120_wdt02.s43 - WDT Toggle P1.0 Interval overflow ISR, 32kHz ACLK
fet120_wdt03.s43 - WDT Toggle P1.0 Interval overflow ISR, HF XTAL ACLK |
MSP-FET430P120 "C" Examples http://www-s.ti.com/sc/psheets/slac013/slac013.zip (43k)
| | fet120_1.c - Software Toggle P1.0
fet120_ADC10_01.c - ADC10 Sample A0, AVcc, Set P1.0 if > 0.5*AVcc
fet120_ADC10_02.c - ADC10 Sample A0, 1.5V, Set P1.0 if > 0.2V
fet120_ADC10_03.c - ADC10 Sample A10 Temp Set P1.0 if temp > ~ 29c
fet120_ADC10_04.c - ADC10 Sample A0 Signed AVcc Set P1.0 if > 0.5*AVcc
fet120_ADC10_05.c - ADC10 Sample A11 lo_Batt Set P1.0 if < 2.3V
fet120_ADC10_06.c - ADC10 Output Internal Vref on P2.4 and Osc. on P1.0
fet120_ADC10_07.c - ADC10 Sample A0 64x, AVcc, Repeat Single DTC DCO
fet120_ADC10_08.c - ADC10 Sample A0 64x, 1.5V, Repeat Single DTC DCO
fet120_ADC10_09.c - ADC10 Sample A10 64x, 1.5v, Repeat Single DTC DCO
fet120_ADC10_10.c - ADC10 Sample A2-0, AVcc, SIngle Sequence DTC DCO
fet120_ADC10_temp.c - ADC10 Sample A10Temp and Convert to oC and oF
fet120_clks.c - BasicClock Output buffered SMCLK, ACLK and MCLK/12
fet120_flash_write.c - Flash In-System Programming
fet120_hfxtal.c - BasicClock MCLK configured with HF XTAL
fet120_lpm3.c - BasicClock LPM3 Using WDT ISR, 32kHz ACLK
fet120_spi0_016x.c - USART0 SPI Interface with HC165/164 Shift Registers
fet120_ta01.c - Timer_A Toggle P1.0, CCR0 Contmode ISR, DCO SMCLK
fet120_ta02.c - Timer_A Toggle P1.0, CCR0 upmode ISR, DCO SMCLK
fet120_ta03.c - Timer_A Toggle P1.0, overflow ISR, DCO SMCLK
fet120_ta04.c - Timer_A Toggle P1.0, overflow ISR, 32kHz ACLK
fet120_ta05.c - Timer_A Toggle P1.0, CCR0 upmode ISR, 32kHz ACLK
fet120_ta06.c - Timer_A Toggle P1.0, CCR1 Contmode ISR, DCO SMCLK
fet120_ta07.c - Timer_A Toggle P1.0-3 CCRx Contmode ISR, DCO SMCLK
fet120_ta08.c - Timer_A Toggle P1.0-3 CCRx Contmode ISR, 32kHz ACLK
fet120_ta09.c - Timer_A Toggle P1.0-3 CCRx Contmode ISR, HF XTAL ACLK
fet120_ta10.c - Timer_A Toggle P1.1 With TA0 upmode, DCO SMCLK
fet120_ta11.c - Timer_A Toggle P1.1 With TA0 upmode, 32kHz ACLK
fet120_ta12.c - Timer_A Toggle P1.1 With TA0 upmode, HF XTAL ACLK
fet120_ta13.c - Timer_A Toggle P1.1 With TA0 up-downmode, DCO SMCLK
fet120_ta14.c - Timer_A Toggle P1.1 With TA0 up-downmode, 32kHz ACLK
fet120_ta15.c - Timer_A Toggle P1.1 With TA0 up-downmode, HF XTAL ACLK
fet120_ta_pwm01.c - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet120_ta_pwm02.c - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet120_ta_pwm03.c - Timer_A PWM TA1-2 upmode, HFTAL ACLK
fet120_ta_pwm04.c - Timer_A PWM TA1-2 up-downmode, DCO SMCLK
fet120_ta_pwm05.c - Timer_A PWM TA1-2 up-downmode, 32kHz ACLK
fet120_ta_pwm06.c - Timer_A PWM TA1-2 up-downmode, HFTAL ACLK
fet120_uart01_02400.c - USART0 UART 2400 Ultra-low Power Echo ISR, 32kHz ACLK
fet120_uart01_09600.c - USART0 UART 9600 Echo ISR, HF XTAL ACLK
fet120_uart01_19200.c - USART0 UART 19200 Echo ISR, HF XTAL ACLK
fet120_uart01_0115k.c - USART0 UART 115200 Echo ISR, HF XTAL ACLK
fet120_wdt01.c - WDT Toggle P1.0 Interval overflow ISR, DCO SMCLK
fet120_wdt02.c - WDT Toggle P1.0 Interval overflow ISR, 32kHz ACLK
fet120_wdt03.c - WDT Toggle P1.0 Interval overflow ISR, HF XTAL ACLK |
MSP-FET430P140 Assembler Examples http://www-s.ti.com/sc/psheets/slac014/slac014.zip (69k)
| | fet140_1.s43 - Software Toggle P1.0
fet140_adc12_00.s43 - ADC12 Sample A0, AVcc
fet140_adc12_01.s43 - ADC12 Using 10 External Channels for Conversion
fet140_adc12_02.s43 - ADC12 Using an External Reference
fet140_adc12_03.s43 - ADC12 Extended sampling
fet140_adc12_04.s43 - ADC12 Using the Internal Reference
fet140_adc12_05.s43 - ADC12 Repeated Sequence of Conversions
fet140_adc12_06.s43 - ADC12 Repeated Single Channel Conversions
fet140_adc12_07.s43 - ADC12 Single Conversion on Single Channel
fet140_adc12_08.s43 - ADC12 Sequence of Conversions (non-repeated)
fet140_adc12_09.s43 - ADC12 Using the temperature diode
fet140_adc12_10.s43 - ADC12, Trigger Conversion With Timer_A
fet140_clks.s43 - BasicClock Output buffered SMCLK, ACLK and MCLK
fet140_hfxt2.s43 - BasicClock MCLK configured with HF XTAL XT2
fet140_hfxtal.s43 - BasicClock LFXT1/MCLK configured with HF XTAL
fet140_hfxtal_nmi.s43 - BasicClock MCLK configured with HF XTAL and OscFault
fet140_lpm3.s43 - BasicClock LPM3 Using WDT Interrupt ISR, 32kHz ACLK
fet140_spi0_0164.s43 - USART0 SPI Interface to HC164 Shift Register
fet140_spi0_0165.s43 - USART0 SPI Interface to HC165 Shift Register
fet140_spi0_016x.s43 - USART0 SPI Interface to HC165/164 Shift Registers
fet140_spi0_0549.s43 - USART0 SPI Interface to TLC549 8-bit ADC
fet140_spi0_5616.s43 - USART0 SPI Interface to TLV5516 DAC
fet140_ta_pwm01.s43 - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet140_ta_pwm02.s43 - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet140_ta_pwm03.s43 - Timer_A PWM TA1-2 upmode, HFTAL ACLK
fet140_ta_pwm04.s43 - Timer_A PWM TA1-2 up-downmode, DCO SMCLK
fet140_ta_pwm05.s43 - Timer_A PWM TA1-2 up-downmode, 32kHz ACLK
fet140_ta_pwm06.s43 - Timer_A PWM TA1-2 up-downmode, HFTAL ACLK
fet140_ta01.s43 - Timer_A Toggle P1.0, CCR0 Contmode ISR, DCO SMCLK
fet140_ta02.s43 - Timer_A Toggle P1.0, CCR0 upmode ISR, DCO SMCLK
fet140_ta03.s43 - Timer_A Toggle P1.0, overflow ISR, DCO SMCLK
fet140_ta04.s43 - Timer_A Toggle P1.0, overflow ISR, 32kHz ACLK
fet140_ta05.s43 - Timer_A Toggle P1.0, CCR0 upmode ISR, 32kHz ACLK
fet140_ta06.s43 - Timer_A Toggle P1.0, CCR1 Contmode ISR, DCO SMCLK
fet140_ta07.s43 - Timer_A Toggle P1.0-3, CCRx Contmode ISR, DCO SMCLK
fet140_ta08.s43 - Timer_A Toggle P1.0-3, CCRx Contmode ISR, 32kHz ACLK
fet140_ta09.s43 - Timer_A Toggle P1.0-3, CCRx Contmode ISR, HF XTAL ACLK
fet140_tb01.s43 - Timer_B Toggle P1.0, CCR0 Contmode ISR, DCO SMCLK
fet140_tb02.s43 - Timer_B Toggle P1.0, CCR0 upmode ISR, DCO SMCLK
fet140_tb03.s43 - Timer_B Toggle P1.0, overflow ISR, DCO SMCLK
fet140_tb04.s43 - Timer_B Toggle P1.0, overflow ISR, 32kHz ACLK
fet140_tb05.s43 - Timer_B Toggle P1.0, CCR0 upmode ISR, 32kHz ACLK
fet140_tb06.s43 - Timer_B Toggle P4.0-6, CCR1 Contmode ISR, DCO SMCLK
fet140_tb07.s43 - Timer_B Toggle P4.0-6, CCRx Contmode ISR, DCO SMCLK
fet140_tb08.s43 - Timer_B Toggle P4.0-6, CCRx Contmode ISR, 32kHz ACLK
fet140_tb09.s43 - Timer_B Toggle P4.0-6, CCRx Contmode ISR, HF XTAL ACLK
fet140_uart01_02400.s43 - USART0 UART 2400 Ultra-low Power Echo ISR, 32kHz ACLK
fet140_uart01_09600.s43 - USART0 UART 9600 Echo ISR, HF XTAL ACCLK
fet140_uart01_19200.s43 - USART0 UART 19200 Echo ISR, HF XTAL ACLK
fet140_uart01_0115k.s43 - USART0 UART 115200 Echo ISR, HF XTAL ACLK
fet140_uart11_02400.s43 - USART1 UART 2400 Ultra-low Power Echo ISR, 32kHz ACLK
fet140_uart11_09600.s43 - USART1 UART 9600 Echo ISR, HF XTAL ACCLK
fet140_uart11_19200_2.s43 - USART1 UART 19200 Echo ISR, XT2 HF XTAL SMCLK
fet140_uart11_0115k_2.s43 - USART1 UART 115200 Echo ISR, XT2 HF XTAL SMCLK
fet140_uartxx_00123.s43 - USART0/1 UART 19200-115200 Router XT2 HF XTAL SMCLK
fet140_wdt01.s43 - WDT Toggle P1.0 Interval overflow ISR, DCO SMCLK
fet140_wdt02.s43 - WDT Toggle P1.0 Interval overflow ISR, 32kHz ACLK
fet140_wdt03.s43 - WDT Toggle P1.0 Interval overflow ISR, HF XTAL ACLK |
MSP-FET430P140 "C" Examples http://www-s.ti.com/sc/psheets/slac015/slac015.zip (49k)
| | fet140_1.c - Software Toggle P1.0
fet140_adc12_00.c - ADC12 Sample A0, AVcc
fet140_adc12_01.c - ADC12 Using 10 External Channels for Conversion
fet140_adc12_02.c - ADC12 Using an External Reference
fet140_adc12_03.c - ADC12 Extended sampling
fet140_adc12_04.c - ADC12 Using the Internal Reference
fet140_adc12_05.c - ADC12 Repeated Sequence of Conversions
fet140_adc12_06.c - ADC12 Repeated Single Channel Conversions
fet140_adc12_07.c - ADC12 Single Conversion on Single Channel
fet140_adc12_08.c - ADC12 Sequence of Conversions (non-repeated)
fet140_adc12_09.c - ADC12 Using the temperature diode
fet140_adc12_10.c - ADC12, Trigger Conversion With Timer_A
fet140_hfxt2.c - BasicClock MCLK configured with HF XTAL XT2
fet140_hfxtal.c - BasicClock MCLK configured with HF XTAL
fet140_lpm3.c - BasicClock LPM3 Using WDT ISR, 32kHz ACLK
fet140_spi0_016x.c - USART0 SPI Interface with HC165/164 Shift Registers
fet140_ta01.c - Timer_A Toggle P1.0, CCR0 Contmode ISR, DCO SMCLK
fet140_ta02.c - Timer_A Toggle P1.0, CCR0 upmode ISR, DCO SMCLK
fet140_ta03.c - Timer_A Toggle P1.0, overflow ISR, DCO SMCLK
fet140_ta04.c - Timer_A Toggle P1.0, overflow ISR, 32kHz ACLK
fet140_ta05.c - Timer_A Toggle P1.0, CCR0 upmode ISR, 32kHz ACLK
fet140_ta06.c - Timer_A Toggle P1.0, CCR1 Contmode ISR, DCO SMCLK
fet140_ta07.c - Timer_A Toggle P1.0-3 CCRx Contmode ISR, DCO SMCLK
fet140_ta08.c - Timer_A Toggle P1.0-3 CCRx Contmode ISR, 32kHz ACLK
fet140_ta09.c - Timer_A Toggle P1.0-3 CCRx Contmode ISR, HF XTAL ACLK
fet140_ta10.c - Timer_A Toggle P1.1 With TA0 upmode, DCO SMCLK
fet140_ta11.c - Timer_A Toggle P1.1 With TA0 upmode, 32kHz ACLK
fet140_ta12.c - Timer_A Toggle P1.1 With TA0 upmode, HF XTAL ACLK
fet140_ta13.c - Timer_A Toggle P1.1 With TA0 up-downmode, DCO SMCLK
fet140_ta14.c - Timer_A Toggle P1.1 With TA0 up-downmode, 32kHz ACLK
fet140_ta15.c - Timer_A Toggle P1.1 With TA0 up-downmode, HF XTAL ACLK
fet140_ta_pwm01.c - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet140_ta_pwm02.c - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet140_ta_pwm03.c - Timer_A PWM TA1-2 upmode, HFTAL ACLK
fet140_ta_pwm04.c - Timer_A PWM TA1-2 up-downmode, DCO SMCLK
fet140_ta_pwm05.c - Timer_A PWM TA1-2 up-downmode, 32kHz ACLK
fet140_ta_pwm06.c - Timer_A PWM TA1-2 up-downmode, HFTAL ACLK
fet140_tb01.c - Timer_B Toggle P1.0, TBCCR0 Contmode ISR, DCO SMCLK
fet140_tb02.c - Timer_B Toggle P1.0, CCR0 upmode ISR, DCO SMCLK
fet140_tb03.c - Timer_B Toggle P1.0, overflow ISR, DCO SMCLK
fet140_tb04.c - Timer_B Toggle P1.0, overflow ISR, 32kHz ACLK
fet140_tb05.c - Timer_B Toggle P1.0, CCR0 upmode ISR, 32kHz ACLK
fet140_uart01_02400.c - USART0 UART 2400 Ultra-low Power Echo ISR, 32kHz ACLK
fet140_uart01_09600.c - USART0 UART 9600 Echo ISR, HF XTAL ACLK
fet140_uart01_19200.c - USART0 UART 19200 Echo ISR, HF XTAL ACLK
fet140_uart01_0115k.c - USART0 UART 115200 Echo ISR, HF XTAL ACLK
fet140_uart11_02400.c - USART1 UART 2400 Ultra-low Power Echo ISR, 32kHz ACLK
fet140_uart11_19200_2.c - USART1 UART 19200 Echo ISR, XT2 HF XTAL SMCLK
fet140_uart11_0115k_2.c - USART1 UART 115200 Echo ISR, XT2 HF XTAL SMCLK
fet140_wdt01.c - WDT Toggle P1.0 Interval overflow ISR, DCO SMCLK
fet140_wdt02.c - WDT Toggle P1.0 Interval overflow ISR, 32kHz ACLK |
MSP-FET430P410 Assembler Examples http://www-s.ti.com/sc/psheets/slac016a/slac016a.zip (40k)
| | fet410_1.s43 - Software Toggle P5.1
fet410_clks.s43 - FLL+ Output MCLK, ACLK Using 32k XTAL and DCO
fet410_fll01.s43 - FLL+ clock Runs internal DCO at 2.45Mhz
fet410_fll02.s43 - FLL+ clock runs internal DCO at 8 Mhz
fet410_lpm3.s43 - FLL+ LPM3 Using BasicTimer ISR, 32kHz ACLK
fet410_lcd01.s43 - LCD Put "6543210" on STK/EVK LCD
fet410_lcd02.s43 - LCD Displays numbers on statc LCD
fet410_lcd03.s43 - LCD displays numbers on 4 multiplex rate LCD
fet410_lcd04.s43 - LCD Displays numbers on 3 multiplex rate LCD
fet410_lcd05.s43 - LCD Displays a real time clock on a static LCD
fet410_lcd06.s43 - LCD Displays numbers on 14 segment 4 multiplex rate
fet410_bt01.s43 - BasicTimer Toggle P5.1 using ISR, DCO SMCLK
fet410_bt02.s43 - BasicTimer Toggle P5.1 using ISR, 32kHz ACLK
fet410_isp.s43 - Flash In-System Program memory
fet410_ta01.s43 - Timer_A Toggle P5.1, CCR0 Contmode ISR, DCO SMCLK
fet410_ta02.s43 - Timer_A Toggle P5.1, CCR0 upmode ISR, DCO SMCLK
fet410_ta03.s43 - Timer_A Toggle P5.1, overflow ISR, DCO SMCLK
fet410_ta04.s43 - Timer_A Toggle P5.1, overflow ISR, 32kHz ACLK
fet410_ta05.s43 - Timer_A Toggle P5.1, CCR0 upmode ISR, 32kHz ACLK
fet410_ta_40k.s43 - Timer_A Output 40khz square wave, UpMode SMCLK DCO
fet410_ta_pwm01.s43 - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet410_ta_pwm02.s43 - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet410_ta_dtmf.s43 - Timer_A used to generate DTMF using UpMode, DCO SMCLK
fet410_ta_uart2400.s43 - Timer_A UART 2400 Ultra-low Power Echo, 32kHz ACLK
fet410_ta_uart9600.s43 - Timer_A UART 9600 Echo, DCO SMCLK
fet410_ta_uart115k.s43 - Timer_A UART 115200 Echo, DCO SMCLK
fet410_wdt01.s43 - WDT Toggle P5.1 Interval overflow ISR, DCO SMCLK
fet410_wdt02.s43 - WDT Toggle P5.1 Interval overflow ISR, 32kHz ACLK |
MSP-FET430P410 "C" Examples http://www-s.ti.com/sc/psheets/slac017a/slac017a.zip (40k)
| | fet410_1.c - Software Toggle P5.1
fet410_clks.c - FLL+ Output MCLK, ACLK Using 32k XTAL and DCO
fet410_fll01.c - FLL+ clock Runs internal DCO at 2.45Mhz
fet410_fll02.c - FLL+ clock Runs internal DCO at 8 Mhz
fet410_lpm3.c - FLL+ LPM3 Using BasicTimer ISR, 32kHz ACLK
fet410_bt01.c - BasicTimer Toggle P5.1 using ISR, DCO SMCLK
fet410_bt02.c - BasicTimer Toggle P5.1 using ISR, 32kHz ACLK
fet410_lcd01.c - LCD Put "6543210" on STK/EVK LCD
fet410_lcd02.c - LCD displays numbers on static LCD
fet410_lcd03.c - LCD displays numbers on 4 multiplex rate LCD
fet410_ta01.c - Timer_A Toggle P5.1, CCR0 Contmode ISR, DCO SMCLK
fet410_ta02.c - Timer_A Toggle P5.1, CCR0 upmode ISR, DCO SMCLK
fet410_ta03.c - Timer_A Toggle P5.1, overflow ISR, DCO SMCLK
fet410_ta04.c - Timer_A Toggle P5.1, overflow ISR, 32kHz ACLK
fet410_ta05.c - Timer_A Toggle P5.1, CCR0 upmode ISR, 32kHz ACLK
fet410_ta_pwm01.c - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet410_ta_pwm02.c - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet410_ta_uart2400.c - Timer_A UART 2400 Ultra-low Power Echo, 32kHz ACLK
fet410_ta_uart9600.c - Timer_A UART 9600 Echo, DCO SMCLK
fet410_ta_uart115k.c - Timer_A UART 115200 Echo, DCO SMCLK
fet410_wdt01.c - WDT Toggle P5.1 Interval overflow ISR, DCO SMCLK
fet410_wdt02.c - WDT Toggle P5.1 Interval overflow ISR, 32kHz ACLK |
MSP-FET430P440 Assembler Examples http://www-s.ti.com/sc/psheets/slac018/slac018.zip (57k)
| | fet440_1.s43 - Software Toggle P5.1
fet440_adc12_00.s43 - ADC12 Sample A0, AVcc
fet440_adc12_01.s43 - ADC12 Using 10 External Channels for Conversion
fet440_adc12_02.s43 - ADC12 Using an External Reference
fet440_adc12_03.s43 - ADC12 Extended sampling
fet440_adc12_04.s43 - ADC12 Using the Internal Reference
fet440_adc12_05.s43 - ADC12 Repeated Sequence of Conversions
fet440_adc12_06.s43 - ADC12 Repeated Single Channel Conversions
fet440_adc12_07.s43 - ADC12 Single Conversion on Single Channel
fet440_adc12_08.s43 - ADC12 Sequence of Conversions (non-repeated)
fet440_adc12_09.s43 - ADC12 Using the temperature diode
fet440_adc12_10.s43 - ADC12, Trigger Conversion With Timer_A
fet440_bt01.c - BasicTimer Toggle P5.1 using ISR, DCO SMCLK
fet440_bt02.c - BasicTimer Toggle P5.1 using ISR, 32kHz ACLK
fet440_clks1.s43 - FLL+ Output MCLK, SMCLK, ACLK Using 32k XTAL
fet440_clks2.s43 - FLL+ Output 32k xtal + HF xtal + internal DCO
fet440_fll01.s43 - FLL+ clock Runs internal DCO at 2.45Mhz
fet440_fll02.s43 - FLL+ clock runs internal DCO at 8 Mhz
fet440_hfxt2.s43 - FLL+ MCLK configured to operate from XT2 HF XTAL
fet440_isp.s43 - Flash In-System Program memory
fet440_lcd01.s43 - LCD Put "6543210" on STK/EVK LCD
fet440_lcd02.s43 - LCD displays numbers on static LCD
fet440_lcd03.s43 - LCD displays numbers on 4 multiplex rate LCD
fet440_lcd04.s43 - LCD Displays numbers on 3 multiplex rate LCD
fet440_lpm3.s43 - FLL+ LPM3 Using BasicTimer ISR, 32kHz ACLK
fet440_ta01.s43 - Timer_A Toggle P5.1, CCR0 Contmode ISR, DCO SMCLK
fet440_ta02.s43 - Timer_A Toggle P5.1, CCR0 upmode ISR, DCO SMCLK
fet440_ta03.s43 - Timer_A Toggle P5.1, overflow ISR, DCO SMCLK
fet440_ta04.s43 - Timer_A Toggle P5.1, overflow ISR, 32kHz ACLK
fet440_ta05.s43 - Timer_A Toggle P5.1, CCR0 upmode ISR, 32kHz ACLK
fet440_ta_pwm01.s43 - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet440_ta_pwm02.s43 - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet440_tb01.s43 - Timer_B Toggle P5.1, TBCCR0 Contmode ISR, DCO SMCLK
fet440_tb02.s43 - Timer_B Toggle P5.1, TBCCR0 upmode ISR, DCO SMCLK
fet440_tb03.s43 - Timer_B Toggle P5.1, overflow ISR, DCO SMCLK
fet440_tb04.s43 - Timer_B Toggle P5.1, overflow ISR, 32kHz ACLK
fet440_tb05.s43 - Timer_B Toggle P5.1, TBCCR0 upmode ISR, 32kHz ACLK
fet440_spi0_016x.s43 - USART0 SPI Interface to HC165/164 Shift Registers
fet440_uart01_02400.s43 - USART0 UART 2400 Ultra-low Power Echo ISR, 32kHz ACLK
fet440_uart01_09600.s43 - USART0 UART 9600 Echo ISR, DCO SMCLK
fet440_uart01_19200.s43 - USART0 UART 19200 Echo ISR, DCO SMCLK
fet440_uart01_0115k.s43 - USART0 UART 115200 Echo ISR, DCO SMCLK
fet440_uart11_19200.s43 - USART1 UART 19200 Echo ISR, DCO SMCLK
fet440_uart11_38400.s43 - USART1 UART 38400 Echo ISR, DCO SMCLK
fet440_wdt01.s43 - WDT Toggle P5.1 Interval overflow ISR, DCO SMCLK
fet440_wdt02.s43 - WDT Toggle P5.1 Interval overflow ISR, 32kHz ACLK |
MSP-FET430P440 "C" Examples http://www-s.ti.com/sc/psheets/slac019/slac019.zip (39k)
| | fet440_1.c - Software Toggle P5.1
fet440_adc12_00.c - ADC12 Sample A0, AVcc
fet440_adc12_01.c - ADC12 Using 10 External Channels for Conversion
fet440_adc12_02.c - ADC12 Using an External Reference
fet440_adc12_03.c - ADC12 Extended sampling
fet440_adc12_04.c - ADC12 Using the Internal Reference
fet440_adc12_05.c - ADC12 Repeated Sequence of Conversions
fet440_adc12_06.c - ADC12 Repeated Single Channel Conversions
fet440_adc12_07.c - ADC12 Single Conversion on Single Channel
fet440_adc12_08.c - ADC12 Sequence of Conversions (non-repeated)
fet440_adc12_09.c - ADC12 Using the temperature diode
fet440_bt01.c - BasicTimer Toggle P5.1 using ISR, DCO SMCLK
fet440_bt02.c - BasicTimer Toggle P5.1 using ISR, 32kHz ACLK
fet440_clks2.c - FLL+ Output 32k xtal + HF xtal + internal DCO
fet440_fll01.c - FLL+ clock Runs internal DCO at 2.45Mhz
fet440_fll02.c - FLL+ clock runs internal DCO at 8 Mhz
fet440_lcd01.c - LCD Put "6543210" on STK/EVK LCD
fet440_lcd02.c - LCD displays numbers on static LCD
fet410_lcd03.c - LCD displays numbers on 4 multiplex rate LCD
fet440_lpm3.c - FLL+ LPM3 Using BasicTimer ISR, 32kHz ACLK
fet440_spi0_016x.c - USART0 SPI Interface to HC165/164 Shift Registers
fet440_ta01.c - Timer_A Toggle P5.1, CCR0 Contmode ISR, DCO SMCLK
fet440_ta02.c - Timer_A Toggle P5.1, CCR0 upmode ISR, DCO SMCLK
fet440_ta03.c - Timer_A Toggle P5.1, overflow ISR, DCO SMCLK
fet440_ta04.c - Timer_A Toggle P5.1, overflow ISR, 32kHz ACLK
fet440_ta05.c - Timer_A Toggle P5.1, CCR0 upmode ISR, 32kHz ACLK
fet440_ta_pwm01.c - Timer_A PWM TA1-2 upmode, DCO SMCLK
fet440_ta_pwm02.c - Timer_A PWM TA1-2 upmode, 32kHz ACLK
fet440_tb01.c - Timer_B Toggle P5.1, TBCCR0 Contmode ISR, DCO SMCLK
fet440_tb02.c - Timer_B Toggle P5.1, TBCCR0 upmode ISR, DCO SMCLK
fet440_tb03.c - Timer_B Toggle P5.1, overflow ISR, DCO SMCLK
fet440_tb04.c - Timer_B Toggle P5.1, overflow ISR, 32kHz ACLK
fet440_tb05.c - Timer_B Toggle P5.1, TBCCR0 upmode ISR, 32kHz ACLK
fet440_uart01_02400.c - USART0 UART 2400 Ultra-low Power Echo ISR, 32kHz ACLK
fet440_uart01_09600.c - USART0 UART 9600 Echo ISR, DCO SMCLK
fet440_uart01_19200.c - USART0 UART 19200 Echo ISR, DCO SMCLK
fet440_uart01_0115k.c - USART0 UART 115200 Echo ISR, DCO SMCLK
fet440_uart11_19200.c - USART1 UART 19200 Echo ISR, DCO SMCLK
fet440_uart11_38400.c - USART1 UART 38400 Echo ISR, DCO SMCLK
fet440_wdt01.c - WDT Toggle P5.1 Interval overflow ISR, DCO SMCLK
fet440_wdt02.c - WDT Toggle P5.1 Interval overflow ISR, 32kHz ACLK |
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